The manufacture of a variety of products now requires the cost-effective production of very small structures and features, e.g., structures and features having a characteristic dimension at the micrometer or nanometer size scale. Electronic components (e.g., integrated circuits (IC), semiconductor devices, optoelectronics devices, data storage devices, magnetoelectronic devices, magnetooptic devices, packaged devices, microprocessors, memory chips, etc.) for computers and other devices are well-known examples of such products. The never-ending pursuit of electronic components including smaller structures and features is leading increasingly to a need for cost-effective processing of semiconductor substrates with which such components are made to produce structures and features at the nanometer size scale. Other products too, such as flat panel displays, can benefit from substrate processing capability that enables cost-effective production of such small structures and features.
Molecular self-assembly is a technique that can be used to produce very small structures and features, e.g., structures and features having a characteristic dimension at the nanometer size scale. Molecular self-assembly can be used to produce a variety of material formations, such as molecular monolayers (often referred to as self-assembled monolayers, or SAMs), molecular multilayers and nanostructures (e.g., nanotubes, Buckey balls, nanowires). However, to date, molecular self-assembly has not been introduced into commercial production processes used to create products as described above which require production of very small structures and features. Consequently there is a need for the use of molecular self-assembly in substrate processing to form material on a substrate leading to commercial product creation.
The manufacturing of the products described above also entails the integration and sequencing of many unit processing steps. As an example, IC manufacturing typically includes a series of processing steps such as cleaning, surface preparation, deposition, lithography, patterning, etching, planarization, implantation, thermal annealing, and other related unit processing steps. The precise sequencing and integration of the unit processing steps enables the formation of functional devices meeting desired performance metrics such as speed, power consumption, and reliability.
The drive towards ever increasing performance of devices or systems of devices such as in systems on a chip (SOCs) has led to a dramatic increase in the complexity of process sequence integration and device integration, or the means by which the collection of unit processing steps are performed individually and collectively in a particular sequence to yield devices with desired properties and performance. This increase in complexity of device integration has driven the need for, and the subsequent utilization of increasingly complex processing equipment with precisely sequenced process modules to collectively perform an effective unit processing step. The precise sequencing of the unit processing tools, in addition to the unit process modules within each tool, must be properly sequenced and integrated.
In addition to the increasingly challenging process sequence integration requirements, the tools and equipment employed in device manufacturing have been developed to enable the processing of ever increasing substrate sizes in order to fit more ICs per substrate per unit processing step for productivity and cost benefits. Other methods of increasing productivity and decreasing manufacturing costs have been to use batch reactors which provide for parallel processing of multiple monolithic substrates. A common theme has been to process the entire monolithic substrate or batch substrates uniformly, in the same fashion with the same resulting physical, chemical, electrical, and the like properties across the monolithic substrate.
The ability to process uniformly across an entire monolithic substrate and/or across a series of monolithic substrates is advantageous for manufacturing cost effectiveness, repeatability and control when a desired process sequence flow for IC manufacturing has been qualified to provide devices meeting desired yield and performance specifications. However, processing the entire substrate can be disadvantageous since the entire substrate is nominally made the same using the same material(s), process(es), and process sequence integration scheme. Conventional full wafer uniform processing results in fewer data per substrate, longer times to accumulate a wide variety of data and higher costs associated with obtaining such data. Consequently, in order to increase productivity and decrease manufacturing cost there is a need to run more than one processing condition, more than one sequence of processing conditions, more than one process sequence integration flow, and/or combinations of the same, collectively referred to as “combinatorial process sequence integration”, on a single monolithic substrate.
Incorporation By Reference
Each publication, patent, and/or patent application mentioned in this specification is herein incorporated by reference in its entirety to the same extent as if each individual publication and/or patent application was specifically and individually indicated to be incorporated by reference.